The invention relates to what is called a multiscan display in which, even when a horizontal deflecting frequency and a vertical deflecting frequency of an input video signal are different, the video signal can be correctly displayed in accordance with the horizontal or vertical deflecting frequency. More particularly, the invention relates to an automatic adjusting apparatus of a multiscan display which can provide the optimum video display automatically in correspondence to even a signal whose display timings such as blanking period and a video display period and the like of an input video signal are different.
At present, in a display of a computer terminal or the like, there are various kinds of display positions and display sizes, of a video image on the screen and there are also various kinds of deflecting frequencies of an input video signal. Therefore, a multiscan display having a high generality such that a single display can cope with all of video signals is used.
In such a kind of display, there is a display which intends to provide the optimum video display every kind of video signal by using a microcomputer, a memory LSI, or the like. As such a conventional technique, for instance, there is a technique disclosed in JP-U-64-4491.
According to the technique mentioned above, a memory in which information regarding the display position and display size of the video image of each video signal has previously been stored is controlled by using a microcomputer, the information of the optimum display position and display size of the video image is read out from the memory in accordance with the input video signal, and a deflecting circuit of the multiscan display is controlled on the basis of the read-out information. The kind of video signal is judged by detecting a period of an input sync signal. Therefore, when the video signal which is supplied to the multiscan display has previously been known, the optimum video display can be provided.
On the other hand, there is also a technique such that even when the video signal which is supplied to the multiscan display is not preliminarily known, the optimum video display is provided in correspondence to the input video signal. Such a conventional technique is disclosed in JP-A-1-321475 can be mentioned.
FIG. 12 is a block diagram showing a former multiscan display device described in the prior reference, JP-A1-321475. In FIG. 12, reference numeral 21 denotes a signal input circuit, 22 a video pre-amplifier circuit, 23 a video output circuit, 24 a cathode ray tube and a deflection yoke (hereinafter referred to as CRT), 26 a horizontal phase adjust circuit, 27 a horizontal oscillation circuit, 28 a horizontal drive circuit, 29 a horizontal output circuit, 30 a high-voltage generator circuit, 31 a synchronizing signal processing and input signal identification circuit, 32 a vertical deflection circuit, 33 and 34 a user setting means, 35 a control circuit (hereinafter referred to as microcomputer), 36 an EEPROM, 37 frequency band selection decoder circuit, 38 a latch circuit (hereinafter referred to as a D/A converter).
In the display device shown in FIG. 12, a video signal sent from a personal computer is input to the signal input circuit. Then, when the input video signal is a composite video signal, a synchronizing separation circuit separates and extracts a synchronizing signal from the video signal and outputs the separated synchronizing signal to the synchronizing signal processing and input signal identification circuit 31.
On the other hand, when the video signal sent from the personal computer is a separated synchronizing signal, the video signal is directly input to the synchronizing signal processing and input signal identification circuit 31.
In the synchronizing signal processing and input signal identification circuit 31, the polarity of the input synchronizing signal is made the predetermined one and a horizontal synchronizing signal (H. SYNCH) is output to the horizontal phase adjust circuit 26, and a vertical synchronizing signal (V. SYNCH) is output to the vertical deflection circuit 32, respectively.
Furthermore, the video signal is identified by the frequency and polarity of the synchronizing signal and the signal mode of TTL input signal or analog input signal sent from the user setting means 33, and the identified signal is output to the control circuit comprising a microcomputer.
In the control circuit 35, the corresponding control data is read out from the EEPROM 36 and is arithmetically operated on the basis of the identified signal sent from the synchronizing signal processing and input signal identification circuit 31.
Furthermore, a band switching signal is output from a horizontal frequency identification decoder or a vertical frequency identification decoder included in a frequency band selection decoder circuit 37 to the horizontal output circuit 29, and the vertical deflection circuit 32, and thereby each control signal is output from DAC 1-8 of D/A converter 38.
The horizontal phase adjust circuit 26, the horizontal oscillation circuit 27, the horizontal drive circuit 28, the horizontal output circuit 29, and the vertical deflection circuit 32 form a so-called deflection circuit in the display device.
The horizontal phase adjust circuit 26 delays and adjusts the phase of the synchronizing signal by means of a horizontal position control signal from DAC 1 of the D/A converter 38 against the input horizontal synchronizing signal (H.SYNCH), and thereby the horizontal display position of the video signal displayed on a CRT 24 is adjusted.
Furthermore, a horizonal size control signal from DAC 2 is added to the horizontal output circuit 29 to adjust the horizontal display size.
Similarly, the vertical size control signal from DAC 5 and the vertical position from DAC 6 are output to the vertical deflection circuit 32 respectively to adjust the display position and display size.
The control data corresponding to the specific received signal has been previously stored in the EEPROM 36.
Accordingly, there exists no control data corresponding to the EEPROM 36 in accordance with the identification signals of the synchronizing signal processing and input signal identification circuit 31.
Thus, the control circuit 35 arithmetically operates in accordance with the control indicating signal supplied by the user setting means 34 to control the control signal of the D/A converters 38, and thereby the display size and position can be adjusted by a user.
According to such a technique as mentioned above, the operation similar to that in the foregoing conventional technique is executed to the known video signal, instruction signals to adjust the display position, display size, and the like of the video image are manually supplied from the outside of the multiscan display for the other video signals, and a microcomputer generates a control signal of a deflecting circuit on the basis of the input information. In this instance, the control signal can be registered into the memory as new information of the display position and display size of the video image. When the relevant video signal is supplied in the next or subsequent time, the video signal can be handled as a known signal.
In the above conventional technique, it is necessary to provide a step of storing the information of the display position and display size of the video image for the known video signal into the memory at the time of shipping from the factory. In this instance, there is a case where the information to be stored differs in dependence on the corresponding video signal and, even in case of the same video signal, the information to be stored also slightly differs due to a variation of each multiscan display. Therefore, the information of the display position and display size to give the optimum video display with every video signal needs to be set every multiscan display and to be stored into the memory. Thus, an adjusting apparatus and an adjusting time to write the above information into the memory are necessary.
Further, according to the conventional technique, since the input video signal is judged by a difference of the frequency or period of the input sync signal, there is a problem such that even when the sync signal frequency is equal, so long as another video signal of a different display timing (for example, blanking period, video display period, or front porch period) of the video image is supplied, the optimum video display is not obtained.
On the other hand, when an unknown video signal is supplied to the multiscan display, it is necessary for the user of the multiscan display to execute the manual adjustment in order to obtain the optimum video display and it is troublesome in terms of the using efficiency and convenience.